(Some of) Colossus on an FPGA

As a companion to the previous post, I’ve been working on and off for the past several months in a domain new to me: FPGAs. For some time I’ve been wondering about these devices, and the historical Colossus code-breaking computer provided a suitable project for learning more about them.

The result is that I’ve created a partial implementation of the Colossus code-breaking machine on an FPGA. As in the previous post, this blog isn’t the best format to present the details, so please see the write-up here:

and the source here:

For context, this is the Python worked example which I successfully replicated on the FPGA: